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M2354SJFAE

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M2354SJFAE

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Quantity 211 Item Items

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Specification

The NuMicro® M2354 Series is a TrustZone® for Arm®v8-M architecture empowered microcontroller series focusing on IoT Security based on Arm® Cortex®-M23 CPU core technology. It runs up to 96 MHz with 1024 Kbytes embedded Flash memory and 256 Kbytes SRAM, supporting Flash in dual-bank mode, secure firmware OTA (Over-The-Air) update, ultra-low power consumption in normal run with 89.3 uA/MHz in LDO mode, 39.6 uA/MHz in DC-DC mode and and an 8x40/ COMxSEG LCD driver inside. Besides the fundamental microcontroller security features, it further enhances the chip-level security in covering side-channel attacks mitigation to crypto hardware engine, fault injection mitigation for operating voltage and clock as well as active shield to cryptographic key storage. The series supports power supply voltage from 1.7V ~ 3.6V in operating temperature range from -40°C to 105°C, and is equipped with both LDO and DC-DC power supply functionalities. The M2354 Series is quite competitive for those devices that need more secure, fast computing and low power in the IoT market.

Key Features：

•	Security Core
	-	Arm® Cortex®-M23 core Based
	-	TrustZone® for ARM®v8-M
	-	32-bit Single-cycle hardware multiplier
	-	32-bit 17-cycle hardware divider
	-	Up to 8 regions MPU_NS (for non-secure world)
	-	Up to 8 regions MPU_S (for secure world)
	-	8 Security Attribution Unit (SAU) memory regions

•	Memories
	-	1 MB Dual-Bank Flash memory, allowing read-while-write
	-	256 KB SRAM，first 32 KB SRAM with hardware parity check
		16 KB Secure Boot ROM
	-	16 KB Flash User Loader (LDROM)
	-	8 KB Data Flash (with Data Scrambling)
	-	2 KB Flash for Secure Key storage
	-	3 KB OTP memory for General Purpose (3KB data + 1 KB lock bit)
	-	12 KB Secret OTP memory for Platform Security (root keys, product lifecycle management, firmware version control)
	-	ISP / ICP / IAP programming

•	Power management
	-	Normal run：89.3 μA/ MHz (LDO) ; 39.6 μA/ MHz (DC-DC)
	-	Idle mode : 31.5 μA/ MHz (CPU clock disabled, LDO) ; 14.3 μA/ MHz (CPU clock disabled, DC-DC)
	-	Power-down：20 μA
	-	Standby power-down：2.0 μA
	-	Deep power-down：0.5 μA (with V_BAT)
	-	Deep power-down：0.1 μA (V_BAT)
	-	V_BAT supply for RTC：0.5 μA (80 bytes spare registers)

•	Crypto and Security
	-	True random number generator (TRNG)
	-	AES-256/ SHA-512/ HMAC-512 (AES with CCM, GCM, GMAC modes)
	-	RSA-4096
	-	The ECC accelerator is a fully compliant implementation for the prime field GF (p) and binary field GF (2^m) algorithms. The prime field GF (p) supports up to NIST P-521. The binary field GF (2^m) supports up to NIST B-571 and NIST K-163, K-233, K-283, K - 409, and K-571.
	-	SM2/ SM3/ SM4 (Chinese national cryptography standards)
	-	CRC calculation unit

•	Communication interfaces
	-	Up to 11 UART interfaces (up to10.66 MHz) ，with up to 3 ISO-7816-3 interfaces, 6 RS-485、2 USCI，and 2 LIN interfaces
	-	Up to 5 I²C interfaces (up to 1 Mbps), with up to 3 I²C with SM Bus/ PM Bus、2 USCI
	-	Up to 7 SPI interfaces (up to 64 MHz), with 4 I²S interfaces, additional 1 Quad-SPI interfaces, 2 USCI
	-	Up to 4 I²S interfaces，3 I²S shared with 3 SPI
	-	Secure Digital I/O (SDIO) (up to 50 MHz)

•	Advanced connectivity
	-	USB 2.0 full speed OTG controller with on-chip PHY
	-	One CAN interface up to 1 Mbps ( CAN 2.0A and 2.0B)
	-	Crystal-less USB
	-	8 x 13 COM/SEG Segment LCD Display

•	Operating Characteristics
	-	Running up to 96 MHz
	-	Voltage range: 1.7V to 3.6 V
	-	Temperature range: -40°C to 105°C
	-	Selectable core power voltage levels: 1.26V or 1.2V in run and idle mode

•	Packages (RoHS)
	-	LQFP 64-pin